This invention relates to semiconductor memory devices, and in particular, to non-volatile electrically reloadable or rewritable semiconductor memory devices. The present invention also particularly relates to a write-protection arrangement for such a memory device, and especially to write-protection for ferroelectric memory elements.
LSIs (Large Scale Integrated circuits) such as microprocessors and memories for portable information apparatus such as PDAs (Personal Digital Assistants) are expected to work more effectively with lower power. For the PDA memory, both a ROM (Read Only Memory) and a RAM (Randon-Access Memory) are necessary. The ROM is used to store an OS (Operating System) and application software while the RAM is used to store such rewritable or reloadable data as display data and personal data. As such, the RAM is used as a work memory for processing. PDAs also typically include a reloadable ROM such as flash memory card to store a large quantity of data which exceed RAM capacity and cannot be stored in the RAM. The RAM is typcially battery-protected (with a battery backup) so that the data will not be erased when the power is turned off and on. A resume function may be achieved so the previous state (where turned off) of the microprocessor can be restored when turning the power on.
On the other hand, ferroelectric memories have recently been developed which are characterized by having an operating speed equivalent to a RAM plus the added advantage of non-volatility. Therefore, it has been considered to substitute ferroelectric memories for DRAMs (Dynamic RAM) in portable information devices. Related matters are referred to in the first edition of "Ferroelectric Thin Film Memory" Chapter 8, pp. 337-345, Jun. 30, 1995 published by Science Forum Co. Ltd.
The inventors of the present invention examined using a ferroelectric memory in place of a ROM and the battery-protected SRAM (Static RAM) for a portable information device. When a part of the ferroelectric memory is used as a ROM, it is necessary to protect ROM data from being re-written by accident due to system runaway or the like.
In one example of a conventional write protection system for discrete or single unit non-volatile memories an EEPROM (Electrically Erasable and Programmable ROM) with software data protection is utilized to prevent false rewriting caused by external noise which typically occurs during packaging. For example, the brief description is referred to in the 17th edition of "Hitachi IC Memory Data Book 3 EEPROM, Flash Memory, EP/OTPROM, Mask ROM" pp. 134-148 (HN58V1001 Series), August, 1995, published by Hitachi, Ltd. (hereafter referred to as technology 1). This EEPROM enters into the protection mode when the combination of a designated address and data is input three times (3-bytes). On the other hand, the EEPROM exits from the protection mode when the combination of a designated address and data is input six times (6-bytes). Such software data protection of the EEPROM is the write-protection technique applied to the whole memory.
An example of a one-chip microcomputer including a built-in ferroelectric memory divided into a ROM area and a RAM area is disclosed in Japan Laid-Open Patent Application No. H. 7-114497 (U.S. patent application Ser. No. 08/295,295) (hereafter referred to as technology 2). This ferroelectric memory is divided into the ROM area to be used as a ROM and the RAM area to be used as a RAM. If an attempt is made to write into the ROM area, the write control signal can be inhibited in order to prevent the data from being written by accident into the ROM address area. The ROM area and the RAM area are placed adjacent to one another in a continuous address space, and the boundary address information between the ROM area and the RAM area is set in the boundary setting register. Therefore, the capacities of the ROM and the RAM areas are interchangeable.